Load Instructions

la Rdest, address

Load Address

Load computed address, not the contents of the location, into register Rdest.

lb Rdest, address

Load Byte

lbu Rdest, address

Load Unsigned Byte

Load the byte at address into register Rdest. The byte is sign-extended by the lb, but not the lbu, instruction.

ld Rdest, address

Load Double-Word

Load the 64-bit quantity at address into registers Rdest and Rdest + 1.

lh Rdest, address

Load Halfword

lhu Rdest, address

Load Unsigned Halfword

Load the 16-bit quantity (halfword) at address into register Rdest. The halfword is sign-extended by the lh, but not the lhu, instruction

lw Rdest, address

Load Word

Load the 32-bit quantity (word) at address into register Rdest.

lwcz Rdest, address

Load Word Coprocessor

Load the word at address into register Rdest of coprocessor z (0-3).

lwl Rdest, address

Load Word Left

lwr Rdest, address

Load Word Right

Load the left (right) bytes from the word at the possibly-unaligned address into register Rdest.

ulh Rdest, address

Unaligned Load Halfword

ulhu Rdest, address

Unaligned Load Halfword Unsigned

Load the 16-bit quantity (halfword) at the possibly-unaligned address into register Rdest. The halfword is sign-extended by the ulh, but not the ulhu, instruction

ulw Rdest, address

Unaligned Load Word

Load the 32-bit quantity (word) at the possibly-unaligned address into register Rdest.