Pin: A Dynamic Instrumentation Tool for
Compiler, Architectural and Microarchitectural Research


Presenters: Kim Hazelwood, Robert Muth and Ramesh Peri

Web Site: http://rogue.colorado.edu/Pin

Abstract

This tutorial describes program instrumentation with the Pin dynamic binary rewriting engine. Pin enables the creation of ATOM-like instrumentation tools for Linux executables and is provided by Intel® free of charge*. Unlike static instrumentation engines, it allows code (written in C or C++) to be injected at arbitrary places in an executable while it is running. (It is even possible to 'attach' to an already running process.) The injected code is used to observe the behavior of the program, and can be used to write branch predictors, profilers, memory leak detectors, etc. Its robust design and simple user model makes it easy to perform studies that span workstation applications to complex server applications like commercial databases. With several thousand downloads, Pin is very popular in both academia and industry. Currently supported platforms include Linux for Intel Xscale, IA-32, EM64T (IA-32 64-bit extension), and Itanium microprocessors. A MS Windows port of IA-32 is in preparation.

(*) The Pin engine is closed source, however various open source Pin tools are included in the distribution

Description

This tutorial is aimed at anybody who wants to write her own Pin based tools and/or get some idea what is possible with Pin. Prerequisites are familiarity with C/C++ and basic compiler and computer architecture concepts.

Part 1

The first part of the tutorial is an introduction to Pin and its basic API for writing instrumentation tools. A number of simple (one page) tools will be used to motivate and explain topics such as just-in-time vs. ahead-of-time instrumentation, instrumentation time vs. analysis time performance trade-offs, ISA independence, etc.. (The discussion will focus on Pin2 and its multi-platform instrumentation API rather than Pin0 which only ran on Linux/IPF)

Part 2

The second part of the tutorial will describe a number of more sophisticated cross-architectural Pin tools. These tools have been used at Intel for a number of interesting performance, compiler and (micro) architectural studies. We will share the implementation of these tools and the results obtained using these tools to solve some real world problems.

Presenters' Biographical Information

KIM HAZELWOOD ROBERT MUTH RAMESH PERI
Kim Hazelwood, Intel.
Hazelwood @ acm . org

Kim Hazelwood is a researcher on the Pin project at Intel. She works on system development within the Pin infrastructure, focusing on the code cache. Prior to joining Intel, Kim worked on numerous dynamic optimizers, including DynamoRIO, DELI, CarbonFire, and Jikes RVM. Kim received a Ph.D. in Computer Science from Harvard University. Her thesis focused on code cache management for large, interactive applications.
Robert Muth, Intel.
Robert.Muth @ intel . com

Robert Muth is a Systems Engineer at Intel, where he works on static and dynamic binary rewriting technologies. He is one of the main authors of the Pin code base. Besides Pin, he has worked on Charm, Ispike, Spike, and ALTO/Squeeze. Robert received a Ph.D. in Computer Science from the University of Arizona, Tucson.
Ramesh Peri, Intel.
Ramesh.V.Peri @ intel . com

Ramesh Peri manages a team of engineers producing software quality tools at Intel based on dynamic and static instrumentation technologies. Prior to Intel Ramesh worked at HP, Lucent and Panasonic on developing compilers, debuggers, profilers, binary rewriters for a variety of processors in high performance and embedded systems Ramesh received a Ph.D in Computer Science from University of Virginia, Charlottesville.