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CS490A: Multicore Architectures

Spring 07.
Tu, Th, 1:30 - 2:50 PM
LWSN 1106

Instructor: Ananth Grama, LWSN 3-154G, Office Hours: W: 1:30 - 3:00 and by appointment

Teaching Assistant: To Be Announced.

Course Announcements:

Important announcements relating to the course will be made here. Please look at this area of the web page periodically.

Course Contents:

CS490A, Multicore Architectures deals with architecture, system software, and application development issues associated with multicore processors.
  • Architecture of Multicore Processors: The first part of this class discusses general processor architectures, memory system architecture, and uses these to motivate multicore architectures. It them covers various designs, including those from Intel, AMD, IBM, and Sun and discusses their relative merits.
  • System Support for Multicore Architectures: The second part of this class discusses issues of programming multicore architecture. It initiates the discussion with commonly used threads models, discusses the performance implications of these models, and explores alternate models of programming.
  • Application Development: The third part of the class deals with application development. A variety of scientific and business applications will be discussed.

Reading list

    PLDI 2007

  • X10: Concurrent Programming for Modern Architectures Vijay Saraswat (IBM TJ Watson Research Center) Vivek Sarkar (IBM TJ Watson Research Center) Nathaniel Nystron (IBM TJ Watson Research Center)
  • Optimistic Parallelism Requires Abstractions Milind Kulkarni, Keshav Pingali, Bruce Walter, Ganesh Ramanarayanan, Kavita Bala and Paul Chew
  • A Race and Transaction-Aware Runtime for Java Tayfun Elmas, Serdar Tasiran and Shaz Qadeer

    ISCA 2006

  • Cooperative Caching for Chip Multiprocessors Jichuan Chang, University of Wisconsin-Madison Gurindar S. Sohi, University of Wisconsin-Madison
  • Memory Model = Instruction Reordering + Store Atomicity Arvind, MIT Jan Willem Maessen, Sun Microsystems
  • Architectural Semantics for Practical Transactional Memory Austen McDonald, Stanford University JaeWoong Chung, Stanford University Brian D. Carlstrom, Stanford University Chi Cao Minh, Stanford University Hassan Chafi, Stanford University Christos Kozyrakis, Stanford University Kunle Olukotun, Stanford University
  • Techniques for Multicore Thermal Management: Classification and New Exploration James Donald, Princeton University Margaret Martonosi, Princeton University

    ASPLOS 2006

  • UNBOUNDED PAGE-BASED TRANSACTIONAL MEMORY. Wei Chuang, Satish Narayanasamy, Ganesh Venkatesh, Jack Sampson, Michael Van Biesbrouck, Gilles Pokam, Osvaldo Colavin and Brad Calder
  • SUPPORTING NESTED TRANSACTIONS IN LOGTM. Michelle Moravan, Jayaram Bobba, Kevin Moore, Luke Yen, Mark Hill, Ben Liblit, Michael Swift and David Wood
  • TRADEOFFS IN TRANSACTIONAL MEMORY VIRTUALIZATIONS. JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D Carlstrom, Christos Kozyrakis and Kunle Olukotun

    PLDI 2006

  • The Atomos Transactional Programming Language, Brian D. Carlstrom, Austen McDonald, Hassan Chafi, JaeWoong Chung, Chi Cao Minh, Christos Kozyrakis, Kunle Olukotun (Stanford University)
  • Optimizing Memory Transactions, PPT Timothy Harris, Mark Plesko (Microsoft Research) Avraham Shinnar (Harvard University) David Tarditi (Microsoft Research)
  • Compiler and Runtime Support for Efficient Software Transactional Memory, Ali-Reza Adl-Tabatabai, Brian T. Lewis, Vijay Menon, Brian R. Murphy, Bratin Saha, Tatiana Shpeisman (Intel)
  • Effective Static Race Detection for Java, PPT Mayur Naik, Alex Aiken, John Whaley (Stanford University)
  • LOCKSMITH: Context-Sensitive Correlation Analysis for Race Detection, Polyvios Pratikakis, Jeffrey S. Foster, Michael Hicks (University of Maryland)

    ISCA 2005

  • The Impact of Performance Asymmetry in Emerging Multicore Architectures Saisanthosh Balakrishnan, University of Wisconsin-Madison Ravi Rajwar, Intel Mike Upton, Intel Konrad Lai, Intel

    Some classic papers:

  • Maurice P. Herlihy and J. Eliot B. Moss, ``Transactional Memory: Architectural Support for Lock-Free Data Structures,'' International Symposium on Computer Architecture (ISCA 1993), San Diego, CA, May 1993, pp. 289-300. http://www.cs.umass.edu/~moss/papers/isca-1993-trans-mem.pdf. <\ul>

    Paper Assignments

    • Ryan Keys and Jeremy Orlow Compiler and Runtime Support for Efficient Software Transactional Memory,
    • Dave Donahue and Darrin Machay Cooperative Caching for Chip Multiprocessors
    • David R. Stites Techniques for Multicore Thermal Management: Classification and New Exploration
    • Ryan Rueth and Andrew S Keller Optimizing Memory Transactions
    • Aqeel Gunja and Sahil Desai, X10: Concurrent Programming for Modern Architectures
    • John Horst and Michael Olson. The Atomos Transactional Programming Language.
    • Dave Lo and Kevin McCarthy. The Impact of Performance Asymmetry in Emerging Multicore Architectures.
An excellent set of slides on multiprocessor synchronization here.