Research Assistants: Y. Song, R. Xu
Sponsors: NSF/Minnesota, PRF
Zhiyuan Li and his compiler group at Purdue collaborate with a research group, led by Pen-Chung Yew and David Lilja, at University of Minnesota, in an NSF-funded joint research project which builds an advanced parallelizing C compiler. This new C compiler, Agassiz, aggressively pursue parallel execution opportunities provided by innovative hardware features which support thread-level speculative execution.
Future microprocessors will soon be able to issue and execute more than a dozen instructions per machine cycle. How to extract sufficient independent instructions per machine cycle from an ordinary program has become an increasingly difficult challenge. Growing evidences suggest that future processors need to take advantage of multiple threads of execution in order to find sufficient parallel operations. Run-time data dependence checking performed by innovative hardware mechanisms makes it possible to avoid high overhead in scheduling and synchronization which is typical in traditional multiprocessors. Automatic rollback hardware can also greatly reduce the penalty of starting a parallel thread prematurely. The compiler, however, faces new challenges to utilize the new hardware features efficiently. The Agassiz project investigate new program transformations, new scheduling methods and memory-hierarchy management techniques to improve the overall performance of thread-level speculative execution.